1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chip thermal interface materials and methods of making the same.
2. Description of the Related Art
Many current integrated circuits are formed as multiple chips or dice on a common wafer. After the basic process steps to form the circuits on the dice are complete, the individual die are singulated from the wafer. The singulated die are then usually mounted to structures, such as circuit boards, or packaged in some form of enclosure.
One frequently-used package consists of a substrate upon which a die is mounted. The upper surface of the substrate includes electrical interconnects. The die is manufactured with a plurality of bond pads. A collection of solder joints are provided between the bond pads of the die and the substrate interconnects to establish ohmic contact. After the die is mounted to the substrate, a lid is attached to the substrate to cover the die. To interface electrically with another circuit board or device, the package substrate is typically fabricated with an input/output (I/O) system. Socket suitable examples include pin grid arrays and land grid arrays. Surface mount examples include solder ball grid arrays.
Some conventional integrated circuits, such as microprocessors, generate sizeable quantities of heat that must be transferred away to avoid device shutdown or damage. The lid serves as both a protective cover and a heat transfer pathway. To provide a heat transfer pathway from the integrated circuit to the lid, a thermal interface material (TIM) is placed on the upper surface of the integrated circuit. In an ideal situation, the thermal interface material fully contacts both the upper surface of the integrated circuit and the portion of the lower surface of the lid that overlies the integrated circuit. Conventional thermal interface materials include various types of pastes, and in some cases, a metal. Gel-type thermal interface materials consist of a polymeric matrix interspersed with thermally conductive particles, such as aluminum. Organic thermal interface materials generally do not provide the high thermal conductivities required for large die, high thermal design power package applications. Organic TIM materials also have present challenges with meeting moisture sensitivity and multiple reflow reliability requirements. More recently, designers have begun to turn to solder materials as a thermal interface material, particularly for high power-high temperature chips.
A solder thermal interface material like indium has favorable thermal properties that work well for high power-high temperature die. However, indium presents design challenges. First, indium exhibits relatively poor adhesion to silicon. To facilitate bonding with indium, the backside of a silicon die may be provided with a metallization stack that includes a layer that readily adheres to silicon, a layer that readily wets indium and perhaps one or more intermediary barrier or other layers. An entire wafer of dice may be provided with respective metallization stacks en masse prior to dicing. To establish favorable thermal contact between a conventional solder thermal interface material and the semiconductor chip and lid that bracket it, a reflow process is performed to wet the applicable surfaces. Second, indium has a low melting point compared to solders used in electronic manufacturing. A typical conventional package substrate must be heated well above the melting point of indium in order to reflow a package ball grid array during surface mounting. The indium thermal interface material might degrade in various ways such as temporary liquification. Thus, indium is unsuitable for surface mount package applications.
Alternatives to indium for surface mount packages have remained elusive. The main reason is that there is has not been a combination of a manufacturable attachment method in assembly, and a thermal interface that will survive multiple reflow events. Some known potential alternatives to indium might be any number of typical solder alloys currently used in electronics manufacturing. These materials can exhibit a wide range of melting points, between 183° C. for eutectic Pb—Sn and 280° C. for Au—Sn. Application of such materials as TIMs would require thermal processing that is typically a minimum of 20 to 30° C. higher than their liquidus points. Once a lid is attached using any of these materials as TIMs, any subsequent thermal processing that exceeds their liquidus points will cause them to reflow. Any reflow that occurs subsequent to the initial attachment of the lid will lead to the same degradation of the thermal interface material due to solder movement, dewetting, and void formation in the liquid state.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.